Cypress Semiconductor FX2LP Información técnica descargar pdf (Pagina 408)

EZ-USB FX2 Technical Reference Manual

Page 15-88 EZ-USB FX2 Technical Reference Manual v2.1

The bit definitions for this register are analogous to the bit definitions in the RDY LOGIC opcode in

a waveform descriptor. Except, instead of controlling the branching for a decision point, it controls

the freezing or flowing of data on the bus in a flow state.

The user defines the states of CTL[5:0] for when the flow logic equals 0 and 1 (see

FLOWEQ0_CTL and FLOWEQ1_CTL). This is useful in activating or deactivating protocol ready

signals to hold off an external master (where the GPIF is acting like a slave) in response to internal

FIFO flags warning of an impending underflow or overflow situation.

In the case where the GPIF is the master, then the user also defines whether Master Strobe (a

CTL pin in this case; see FLOWSTB) toggles (reads or writes data on the bus) when the flow logic

evaluates to a 1 or a 0. This is useful for the GPIF to consider protocol ready signals from the

slave as well as FIFO flags to decide when to clock data out of or into the FIFOs and when to

freeze the data flow instead.

It should be noted that this flow logic does not replace the decision point logic defined in a wave-

form descriptor. The decision point logic in a waveform descriptor is still used to decide when to

branch out of the flow state. The decision point logic can use an entirely different pair of ready sig-

nals than the flow logic in making its decisions.

Bits 7-6 LFUNC[1:0] Flow State Logic Function

00 = A AND B

01 = A OR B

10 = A XOR B

11 = !A AND B

Since the flow logic decision can be based on the output being a 1 or a 0, NAND, NOR, XNOR

and !(!A AND B) operations can be achieved as well. Note that !(!A AND B) is the same as (A

OR !B).

FLOWLOGIC E6C7

b7 b6 b5 b4 b3 b2 b1 b0

LFUNC[1:0] TERMA[2:0] TERMB[2:0]

0 0 0 0 0 0 0 0

RW RW RW RW RW RW RW RW

1 2 ... 403 404 405 406 407 408 409 410 411 412 413 ... 459 460

Sin comentarios

Cypress Semiconductor FX2LP Información técnica Pagina 408