Cypress Semiconductor enCoRe CY7C64215 Manual de usuario

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CY7C64215
enCoRe™ III Full Speed USB Controller
Cypress Semiconductor Corporation 198 Champion Court San Jose, CA 95134-1709 408-943-2600
Document Number: 38-08036 Rev. *E Revised February 1, 2010
Features
Powerful Harvard Architecture Processor
M8C Processor Speeds to 24 MHz
Two 8x8 Multiply, 32-Bit Accumulate
3.15 to 5.25V Operating Voltage
USB 2.0 USB-IF Certified. TID# 40000110
Commercial Operating Temperature Range: 0°C to +70°C
Industrial Operating Temperature Range: –40°C to +85°C
Advanced Peripherals (enCoRe™ III Blocks)
6 Analog enCoRe III Blocks provide:
Up to 14-Bit Incremental and Delta Sigma ADCs
Programmable Threshold Comparator
Four Digital enCoRe III Blocks Provide:
8-Bit and 16-Bit PWMs, Timers, and Counters
•I
2
C Master
SPI Master or Slave
Full Duplex UART
CYFISNP and CYFISPI Modules to Talk to Cypress CYFI
Radio
Complex Peripherals by Combining Blocks
Full Speed USB (12 Mbps)
Four Unidirectional Endpoints
One Bidirectional Control Endpoint
Dedicated 256 Byte Buffer
No External Crystal Required
Operational at 3.15V to 3.5V or 4.35V to 5.25V
Flexible On-Chip Memory
16K Flash Program Storage 50,000 Erase/Write Cycles
1K SRAM Data Storage
In-System Serial Programming (ISSP)
Partial Flash Updates
Flexible Protection Modes
EEPROM Emulation in Flash
Programmable Pin Configurations
25 mA Sink on all GPIO
Pull Up, Pull Down, High Z, Strong, or Open Drain Drive
Modes on all GPIO
Configurable Interrupt on all GPIO
Precision, Programmable Clocking
Internal ±4% 24 and 48 MHz Oscillator with Support for
External Clock Oscillator
Internal Oscillator for Watchdog and Sleep
.25% Accuracy for USB with no External Components
Additional System Resources
I
2
C Slave, Master, and Multi-Master to 400 kHz
Watchdog and Sleep Timers
User-Configurable Low Voltage Detection
Integrated Supervisory Circuit
On-Chip Precision Voltage Reference
Complete Development Tools
Free Development Software (PSoC Designer)
Full Featured, In-Circuit Emulator and Programmer
Full Speed Emulation
Complex Breakpoint Structure
128K Bytes Trace Memory
enCoRe III Core
Block Diagram
[+] Feedback
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Indice de contenidos

Pagina 1 - CY7C64215

CY7C64215enCoRe™ III Full Speed USB ControllerCypress Semiconductor Corporation • 198 Champion Court • San Jose, CA 95134-1709 • 408-943-2600Document

Pagina 2

CY7C64215Document Number: 38-08036 Rev. *E Page 10 of 33Register ReferenceThe register conventions specific to this section are listed in the followin

Pagina 3

CY7C64215Document Number: 38-08036 Rev. *E Page 11 of 33Register Map Bank 0 Table: User Space Name Addr (0,Hex) Access Name Addr (0,Hex) Access Name A

Pagina 4

CY7C64215Document Number: 38-08036 Rev. *E Page 12 of 33Register Map Bank 1 Table: Configuration Space NameAddr(1,Hex)Access NameAddr(1,Hex)Access Na

Pagina 5

CY7C64215Document Number: 38-08036 Rev. *E Page 13 of 33Electrical SpecificationsThis section presents the DC and AC electrical specifications of the

Pagina 6

CY7C64215Document Number: 38-08036 Rev. *E Page 14 of 33Absolute Maximum RatingsOperating TemperatureTable 6. Absolute Maximum RatingsParameter Descr

Pagina 7

CY7C64215Document Number: 38-08036 Rev. *E Page 15 of 33DC Electrical CharacteristicsDC Chip-Level SpecificationsThe following table lists guaranteed

Pagina 8

CY7C64215Document Number: 38-08036 Rev. *E Page 16 of 33DC Full Speed USB SpecificationsThe following table lists guaranteed maximum and minimum speci

Pagina 9

CY7C64215Document Number: 38-08036 Rev. *E Page 17 of 33DC Analog Output Buffer SpecificationsThe following tables list guaranteed maximum and minimum

Pagina 10

CY7C64215Document Number: 38-08036 Rev. *E Page 18 of 33DC Analog Reference SpecificationsThe following tables list guaranteed maximum and minimum spe

Pagina 11

CY7C64215Document Number: 38-08036 Rev. *E Page 19 of 33DC Analog enCoRe III Block SpecificationsThe following table lists guaranteed maximum and mini

Pagina 12

CY7C64215Document Number: 38-08036 Rev. *E Page 2 of 33ContentsFeatures ...1

Pagina 13

CY7C64215Document Number: 38-08036 Rev. *E Page 20 of 33DC POR and LVD SpecificationsThe following table lists guaranteed maximum and minimum specific

Pagina 14

CY7C64215Document Number: 38-08036 Rev. *E Page 21 of 33DC Programming SpecificationsThe following table lists guaranteed maximum and minimum specific

Pagina 15

CY7C64215Document Number: 38-08036 Rev. *E Page 22 of 33AC Electrical CharacteristicsAC Chip-Level SpecificationsThe following table lists guaranteed

Pagina 16

CY7C64215Document Number: 38-08036 Rev. *E Page 23 of 33AC General Purpose I/O SpecificationsThe following table lists guaranteed maximum and minimum

Pagina 17

CY7C64215Document Number: 38-08036 Rev. *E Page 24 of 33AC Digital Block SpecificationsThe following table lists guaranteed maximum and minimum specif

Pagina 18 - + 0.024 Vdd/2 – BG + 0.04 V

CY7C64215Document Number: 38-08036 Rev. *E Page 25 of 33AC Analog Output Buffer SpecificationsThe following tables list guaranteed maximum and minimum

Pagina 19

CY7C64215Document Number: 38-08036 Rev. *E Page 26 of 33AC Programming SpecificationsThe following table lists guaranteed maximum and minimum specific

Pagina 20

CY7C64215Document Number: 38-08036 Rev. *E Page 27 of 33AC I2C SpecificationsThe following table lists guaranteed maximum and minimum specifications f

Pagina 21

CY7C64215Document Number: 38-08036 Rev. *E Page 28 of 33Packaging InformationThis section illustrates the package specification for the CY7C64215 enCo

Pagina 22 - Jitter24M1

CY7C64215Document Number: 38-08036 Rev. *E Page 29 of 33Figure 10. 56-Pin QFN (8 X 8 X 0.9 MM) (SAWN) Figure 11. 28-Pin (210-Mil) SSOP001-53450 *A

Pagina 23

CY7C64215Document Number: 38-08036 Rev. *E Page 3 of 33Applications PC HID devices❐ Mouse (Optomechanical, Optical, Trackball)❐ Keyboards❐ Joysticks

Pagina 24

CY7C64215Document Number: 38-08036 Rev. *E Page 30 of 33Thermal ImpedanceSolder Reflow Peak TemperatureFollowing is the minimum solder reflow peak tem

Pagina 25

CY7C64215Document Number: 38-08036 Rev. *E Page 31 of 33Ordering InformationPackage Ordering Code Flash Size SRAM (Bytes) Temperature Range56-Pin QFN-

Pagina 26

CY7C64215Document Number: 38-08036 Rev. *E Page 32 of 33Document History PageDescription Title: CY7C64215, enCoRe™ III Full Speed USB ControllerDocume

Pagina 27

Document Number: 38-08036 Rev. *E Revised February 1, 2010 Page 33 of 33PSoC Designer™ and enCoRe™ are trademarks and PSoC® is a registered trademark

Pagina 28

CY7C64215Document Number: 38-08036 Rev. *E Page 4 of 33The Analog SystemThe Analog System is composed of six configurable blocks,comprised of an opamp

Pagina 29

CY7C64215Document Number: 38-08036 Rev. *E Page 5 of 33Getting StartedThe quickest path to understanding the enCoRe III silicon is byreading this data

Pagina 30

CY7C64215Document Number: 38-08036 Rev. *E Page 6 of 33DebuggerThe PSoC Designer Debugger subsystem provides hardwarein-circuit emulation, enabling th

Pagina 31

CY7C64215Document Number: 38-08036 Rev. *E Page 7 of 33The development process starts when you open a new projectand bring up the Device Editor/Chip L

Pagina 32

CY7C64215Document Number: 38-08036 Rev. *E Page 8 of 33Pin Information56-Pin Part PinoutThe CY7C64215 enCoRe III device is available in a 56-pin packa

Pagina 33

CY7C64215Document Number: 38-08036 Rev. *E Page 9 of 3328-Pin Part PinoutThe CY7C64215 enCoRe III device is available in a 28-pin package which is lis

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