Cypress Semiconductor FX2LP Información técnica descargar pdf (Pagina 244)

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EZ-USB FX2 Technical Reference Manual

Page 10-54 EZ-USB FX2 Technical Reference Manual v2.1

Typically, when performing a FIFO-Write, only one “NextData” is needed in the waveform, since

each execution of “NextData” increments the FIFO pointer.

To perform a FIFO-Write Transaction:

1. In the GPIFTRIG register, set the RW bit to 0 and load EP1:0 with the appropriate value for the

FIFO which is to receive the data.

2. Program the FX2 to detect completion of the transaction. As with all GPIF Transactions, bit 7

of the GPIFTRIG register (the DONE bit) signals when the Transaction is complete.

3. Program the FX2 to commit (“pass-on”) the data from the endpoint to the FIFO. The data can

be transferred by either of the following methods:

• AUTOOUT=1: CPU is not in the data path; the FX2 automatically commits data from the

USB to the FIFO Data bus.

• AUTOOUT=0: Firmware must manually commit data to the FIFO Data bus by writing

EPxBCL.7=0 (firmware can choose to skip the current packet by writing EPxBCL.7=1).

The following C program fragments (Figures 10-42 through 10-44) illustrate how to perform a

FIFO-Read transaction in 8-bit mode (WORDWIDE = 0) with AUTOOUT = 0:

Figure 10-42. FIFO-Write Transaction Functions

#define GPIFTRIGWR 0

#define GPIF_EP2 0

#define GPIF_EP4 1

#define GPIF_EP6 2

#define GPIF_EP8 3

#define BURSTMODE 0x0000

#define HSPKTSIZE 512

… … … … …

// write byte(s) to PERIPHERAL, using GPIF and EPxFIFO

void Peripheral_FIFOWrite( BYTE FIFO_EpNum )

{

while( !( GPIFTRIG & 0x80 ) ) // poll GPIFTRIG.7 Done bit

{

;

}

// trigger FIFO write transaction(s), using SFR

GPIFTRIG = FIFO_EpNum; // R/W=0, EP[1:0]=FIFO_EpNum for EPx write(s)

}

// Set EP2GPIF Transaction Count

void Peripheral_SetEP2GPIFTC( WORD xfrcnt)

{

EP2GPIFTCH = xfrcnt >> 8; // setup transaction count

EP2GPIFTCL = ( BYTE )xfrcnt;

}

… … … … …

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