Cypress Semiconductor FX2LP Información técnica descargar pdf (Pagina 39)

Chapter 1. Introducing EZ-USB FX2 Page 1-13

1.13 FX2 Feature Summary

FX2 includes the following features:

• On-chip 480 Mbits/sec transceiver, PLL and SIE—the entire USB 2.0 physical layer (PHY).

• Double-, triple- and quad-buffered endpoint FIFOs accommodate the 480 MBits/sec USB

2.0 data rate.

• Built-in, enhanced 8051 running at up to 48 MHz.

- Fully featured: 256 bytes of register RAM, two USARTs, three timers, two data

pointers.

- Fast: four clocks (83.3 nanoseconds at 48 MHz) per instruction cycle.

- SFR access to control registers (including I/O ports) that require high speed.

- USB-vectored interrupts for low ISR latency.

- Used for USB housekeeping and control, not to move high speed data.

• “Soft” operation—USB firmware can be downloaded over USB, eliminating the need for

hard-coded memory.

• Four interface FIFOs that can be internally or externally clocked. The endpoint and inter-

face FIFOs are unified to eliminate data transfer time between USB and external logic.

• General Programmable Interface (GPIF), a microcoded state machine which serves as a

timing master for ‘glueless’ interface to the FX2 FIFOs.

FX2 is a single-chip USB 2.0 peripheral solution. Unlike designs that use an external PHY, the FX2

integrates everything on one chip, eliminating costly high pin-count packages and the need to

route high-speed signals between chips.

1.14 FX2 Integrated Microprocessor

The FX2’s CPU uses on-chip RAM as program and data memory.

Chapter 5, "Memory",

describes

the various internal/external memory options.

The CPU communicates with the SIE using a set of registers occupying on-chip RAM addresses

0xE600-0xE6FF. These registers are grouped and described by function in individual chapters of

this reference manual and summarized in register order in Chapter 15, "Registers".

The CPU has two duties. First, it participates in the protocol defined in the Universal Serial Bus

Specification Version 2.0, “Chapter 9, USB Device Framework.” Thanks to the FX2’s “smart” SIE,

1 2 ... 34 35 36 37 38 39 40 41 42 43 44 ... 459 460

Sin comentarios

Cypress Semiconductor FX2LP Información técnica Pagina 39