Cypress Semiconductor ISR 37000 CPLD Especificaciones descargar pdf (Pagina 16)

Design Considerations for ISR Programming of Cypress CPLDs

Dual-Function Summary

To summarize this section, there are many ways to accom-

plish programming when using devices with dual-function

pins. The easiest way to use the dual-function device is in

single-function mode. This uses the dual-function pins as pro-

gramming pins only, and is easily accomplished using the

pin_avoid and pin_numbers directives in the Warp design file.

There are also going to be cases where you will want to use

the dual-functionality, most likely because you need some or

all of the four ISR programming pins as inputs, outputs, or

I/Os during normal operation to get all the signals you need

into and out of the device for your design. The circuits needed

to share these pins are relatively straightforward and require

only buffers or pass-transistors. These are circuits you can

implement using FCT or other logic, or you may be able to

implement them using extra gates and pins of an ASIC,

FPGA, or another PLD you already have on the board.

Figure 20. Design for Dual-Function Pins: TDO Used With an I/O

TDO

Signal

ISR*

TDO/I/O

ISR

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Cypress Semiconductor ISR 37000 CPLD Especificaciones Pagina 16