Cypress Semiconductor ISR 37000 CPLD Especificaciones descargar pdf (Pagina 11)

Design Considerations for ISR Programming of Cypress CPLDs

Appendix A. Dual-Function Device Considerations for Ultra37000 and F

LASH

370i CPLDs

Only the Ultra37000 and F

LASH

370i CPLD families support

dual-mode ISR programming pins, whereby compact packag-

es offering these pins can function in JTAG mode or in normal

I/O mode. It is suggested that the following three application

notes, “An Introduction to In-System Reprogramming with the

Ultra37000,” “An Introduction to In-System Reprogramming

with the F

LASH

370i,” and “Understanding Bus-Hold—A Fea-

ture of Cypress CPLDs,” be read along with this application

note to become familiar with these product families. They give

a complete listing of all single- and dual-function mode devic-

es for all members of the F

LASH

370i or Ultra37000 families

Single-/Dual-Function Programming Pins

The next portion of this note explains in detail how to use the

IO function on the JTAG/IO pins. To address this issue, we

categorize designs into three types: designs using devices

with single-function pins; designs using devices with dual-

function pins used in single-function mode; and designs using

devices with dual-function pins in dual-function mode. The

single-function/dual-function names refer to the four ISR pins

and whether they share their functionality with IO pins. Single-

function mode refers to the ISR pins functioning as ISR pins

only. Dual-function mode refers to the ISR pins functioning in

ISR mode during ISR operations as well as IO mode when

the device is operating normally in the board. The three cases

are explained further below.

Single-Function Pins/Single-Function Mode

Some of the ISR devices have pinout/package combinations

such that the pins used for programming are single-function

only; i.e., they are used as programming pins only. When the

device is operating (i.e., not being programmed) they are not

in use and are extra pins. Designing with these devices simply

requires a direct connection from the device ISR pins to the

pins on the ISR programming cable connector for full access

to in-system reprogramming.

Dual-Function Pins/Dual-Function Mode

The rest of the devices in the ISR family have pinout/package

combinations such that the pins used for programming have

dual functionality. They are used as programming pins when

the device is being programmed, and they are used as I/Os

when the device is in normal operating mode. To use both of

these functions, you must design interface logic to isolate pro-

gramming signals from other devices on the board or incor-

porate some of this interface logic into the output enable de-

sign of the devices driving the ISR devices to be programmed.

Dual-Function Pins/Single-Function Mode

Alternatively, the designer can decide to use these dual-func-

tion pins as programming pins only and not connect them as

I/Os for normal operation. In this case we refer to the use of

a dual-function device being used in single-function mode.

The design is simpler in this case as no special interface logic

is required.

Designs That Use Devices With Dual-Function Program-

ming Pins

There are two ways to design with devices that have dual-

function programming pins. First, you could use the dual-

function pins as single-function pins. That is, you could decide

to use only the JTAG function of the pins and not use those

pins as I/Os in your design. The other way to use them is as

true dual-function pins, functioning both as JTAG pins in pro-

gramming mode and as I/Os in normal operating mode. Most

customers will use the dual-function pins only in their JTAG

function.

Devices With Dual-Function Programming Pins Used in Sin-

gle-Function Mode

To use the ISR devices in this way, with the dual-function pins

used as programming pins only, the total number of I/Os used

in your design must be equal to or less than (n–4), where n is

the total number of input and I/O pins available on the device.

This way is the preferred method of design. It is much easier

and will save both time and components over implementing

the kind of logic described in the next section for dual-function

pins used in dual-function mode.

To design with the dual-function pins used in single-function

mode, simply do not allow an I/O function to be placed on

these dual-function pins. Two ways to do this in software are

described below.

First, if you are using the Cypress Warp

VHDL compiler, you

can use a simple synthesis directive called “pin_avoid” to

make sure the compiler does not assign signals to whatever

pins you specify. In this case, of course, you would specify the

pin number of the dual-function pins. An example of the exact

text to include in your VHDL code appears in Figure 12. This

example assumes you are using the CY7C373i or CY7C374i

in the 84-pin PLCC package where pins 14, 35, 51, 72, and

83 are the ISR pins. For a complete listing of all the ISR pins

of all members of the F

LASH

370i or Ultra37000 families see

the application notes “An Introduction to In-System Repro-

gramming (ISR) with the F

LASH

370i” or “An Introduction to In-

System Reprogramming (ISR) with the Ultra37000.”

If you prefer you can also ensure the dual-function pins do not

get used as I/Os in normal operating mode by explicitly as-

signing all of the signals to pins in your design. You just need

to make sure you assign all of the signals to pins other than

the dual-function pins. An example showing how to do this in

Warp using the “pin_numbers” directive is shown in Figure 13.

Again, this example assumes you are using the CY7C373i or

CY7C374i in the 84-pin PLCC package, so pins 14, 35, 51,

72, and 83 are not being used. Notice that none of the signals

used in the example in Figure 13 are assigned to these pins.

This approach can be more time-consuming than using the

“pin_avoid” directive, especially if your design has a large

number of I/Os. When you do this, you also need to take some

device-specific resource information into account. Since the

compiler can account for all of this for you automatically, it is

usually easier to just use the “pin_avoid” directive. Additional-

ly the “pin_avoid” attribute places fewer restrictions on the

fitter software making it easier to fit designs.

Devices With Dual-Function Programming Pins Used in Dual-

Function Mode

There are cases where you may need or want to take advan-

tage of the dual functionality of the dual-function program-

ming pins. For example, you may not have enough I/O pins

for your design if you do not use the dual-function ISR pro-

gramming pins as I/Os when the device is in normal opera-

tion. Other times, you may want to use the dual-function ISR

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