Cypress Semiconductor NoBL CY7C1472V33 Guía de usuario Pagina 8

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Orange Tree Technologies
Page 8 of 57
Unless otherwise stated, pin 1 is indicated on the PCB by the figure ‘1’.
J1 USB B connector
J2 Test header for monitoring USB controller signals:
Pin USB Controller Signal
1 Port E bit 0
2 Port E bit 1
3 Port E bit 2
4 BreakPoint
J3 JTAG header for configuring FPGA:
Pin FPGA JTAG Pin
1 VCC 2.5V
2 Ground
3 TCK
4 TDO
5 TDI
6 TMS
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