Cypress Semiconductor NoBL CY7C1472V33 Guía de usuario descargar pdf (Pagina 43)

ZestSC1 User Guide

CONFIDENTIAL Page 43 of 57

ZestSC1Configure

ZESTSC1_STATUS ZestSC1Configure( ZESTSC1_HANDLE Handle,

ZESTSC1_IMAGE Image);

Parameters

Handle Handle of open ZestSC1 card. See ZestSC1OpenCard.

Image FPGA configuration image to use to configure the FPGA.

Return Value

ZESTSC1_SUCCESS Function succeeded

ZESTSC1_ILLEGAL_HANDLE Attempt to use illegal card handle

ZESTSC1_ILLEGAL_IMAGE_HANDLE Attempt to use illegal configuration image

handle

ZESTSC1_INTERNAL_ERROR An unspecified internal error occurred while

communicating with the driver

ZESTSC1_TIMEOUT Operation timed out

Description

ZestSC1Configure configures the FPGA on the ZestSC1 card from a configuration

image. The configuration image can be created from a .bit file by calling

ZestSC1LoadImage or from data in memory by calling ZestSC1RegisterImage.

Example creating the image from .bit file on disk:

ZESTSC1_IMAGE Image;

ZESTSC1_HANDLE Handle;

/* Load the .bit file */

ZestSC1LoadImage(“test.bit”, &Image);

/* Other initialization operations here */

/* Open a card with ID of 1 */

ZestSC1OpenCard(1, &Handle);

/* Other execution operations here */

/* Configure the FPGA from the image */

ZestSC1Configure(Handle, Image);

Example creating the image from buffer in memory:

extern void *Buffer;

extern unsigned long Length;

ZESTSC1_IMAGE Image;

ZESTSC1_HANDLE Handle;

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Cypress Semiconductor NoBL CY7C1472V33 Guía de usuario Pagina 43