Cypress Semiconductor CY7C1473BV33 Manual de usuario descargar pdf (Pagina 20)

CY7C1471BV33

CY7C1473BV33

Document Number: 001-15029 Rev. *G Page 20 of 31

Maximum Ratings

Exceeding maximum ratings may shorten the useful life of the

device. User guidelines are not tested.

Storage temperature ................................ –65C to +150C

Ambient temperature

with power applied ................................... –55C to +125C

Supply voltage on V

relative to GND .......–0.5 V to +4.6 V

Supply voltage on V

DDQ

relative to GND ...... –0.5 V to +V

DC voltage applied to

outputs in tri-state .............................–0.5 V to V

DDQ

+ 0.5 V

DC input voltage ................................. –0.5 V to V

+ 0.5 V

Current into outputs (LOW) ........................................ 20 mA

Static discharge voltage

(MIL-STD-883, Method 3015) ................................. > 2001 V

Latch-up current .................................................... > 200 mA

Operating Range

Range

Ambient

Temperature

DDQ

Commercial 0 °C to +70 °C 3.3 V– 5% /

+ 10%

2.5 V – 5% to

Industrial –40 °C to +85 °C

Electrical Characteristics

Over the Operating Range

Parameter

[15, 16]

Description Test Conditions Min Max Unit

Power supply voltage 3.135 3.6 V

DDQ

I/O supply voltage For 3.3 V I/O 3.135 V

For 2.5 V I/O 2.375 2.625 V

Output HIGH voltage For 3.3 V I/O, I

= –4.0 mA 2.4 – V

For 2.5 V I/O, I

= –1.0 mA 2.0 – V

Output LOW voltage For 3.3 V I/O, I

= 8.0 mA – 0.4 V

For 2.5 V I/O, I

= 1.0 mA – 0.4 V

Input HIGH voltage

[15]

For 3.3 V I/O 2.0 V

+ 0.3 V V

For 2.5 V I/O 1.7 V

+ 0.3 V V

Input LOW voltage

[15]

For 3.3 V I/O –0.3 0.8 V

For 2.5 V I/O –0.3 0.7 V

Input leakage current except ZZ

and MODE

GND  V

 V

DDQ

–5 5 A

Input current of MODE Input = V

–30 – A

Input = V

–5A

Input current of ZZ Input = V

–5 – A

Input = V

30 A

Output leakage current GND  V

 V

DD,

output disabled –5 5 A

[17]

operating supply current V

= Max., I

OUT

= 0 mA,

f = f

MAX

= 1/t

CYC

7.5 ns cycle,

133 MHz

–305mA

SB1

Automatic CE power-down

current – TTL inputs

= Max, device deselected,

 V

or V

 V

f = f

MAX

, inputs switching

7.5 ns cycle,

133 MHz

–200mA

SB2

Automatic CE power-down

current – CMOS inputs

= Max, device deselected,

 0.3 V or V

> V

– 0.3 V,

f = 0, inputs static

7.5 ns cycle,

133 MHz

–120mA

SB3

Automatic CE power-down

current – CMOS inputs

= Max, device deselected,

 0.3 V or V

> V

DDQ

– 0.3 V,

f = f

MAX

, inputs switching

7.5 ns cycle,

133 MHz

–200mA

Notes

15. Overshoot: V

IH(AC)

< V

+ 1.5 V (pulse width less than t

CYC

/2). Undershoot: V

IL(AC)

> –2 V (pulse width less than t

CYC

/2).

16. T

Power-up

: assumes a linear ramp from 0 V to V

DD(min.)

within 200 ms. During this time V

< V

and V

DDQ

< V

17. The operation current is calculated with 50% read cycle and 50% write cycle.

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