Cypress Semiconductor CY7C1473BV33 Manual de usuario Pagina 10

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CY7C1471BV33
CY7C1473BV33
Document Number: 001-15029 Rev. *G Page 10 of 31
Truth Table
The truth table for CY7C1471BV33, and CY7C1473BV33 follows.
[1, 2, 3, 4, 5, 6, 7]
Operation Address Used CE
1
CE
2
CE
3
ZZ ADV/LD WE BW
X
OE CEN CLK DQ
Deselect cycle None H X X L L X X X L L->H Tri-state
Deselect cycle None X X H L L X X X L L->H Tri-state
Deselect cycle None X L X L L X X X L L->H Tri-state
Continue deselect cycle None X X X L H X X X L L->H Tri-state
Read cycle (begin burst) External L H L L L H X L L L->H Data out (Q)
Read cycle (continue burst) Next X X X L H X X L L L->H Data out (Q)
NOP/Dummy read (begin burst) External L H L L L H X H L L->H Tri-state
Dummy read (continue burst) Next X X X L H X X H L L->H Tri-state
Write cycle (begin burst) External L H L L L L L X L L->H Data in (D)
Write cycle (continue burst) Next X X X L H X L X L L->H Data in (D)
NOP/Write abort (begin burst) None L H L L L L H X L L->H Tri-state
Write abort (continue burst) Next X X X L H X H X L L->H Tri-state
Ignore clock edge (stall) Current X X X L X X X X H L->H
Sleep mode None X X XH X XXXX X Tri-state
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