Cypress Semiconductor Perform CY7C1380D Especificaciones descargar pdf (Pagina 24)

3–12 Chapter 3: Building the SOPC System

Coordinate Components in the System

Nios II System Architect Design Tutorial © June 2009 Altera Corporation

Preliminary

2. Type the interrupt priority value from Table 3–4. Figure 3–10 shows the

lcd_sgdma component after you perform this step.

Set Arbitration Priorities

To ensure that the video pipeline operates smoothly, you must assign the highest

arbitration priority to the lcd_sgdma component to access the ddr_sdram

component. In addition, because the heap memory is located in DDR SDRAM, you

must increase the arbitration priority of the Nios II processor for ddr_sdram to

support more back-to-back data transactions.

To assign arbitration priorities among the components in your system, perform the

following steps:

1. On the View menu, click Show Arbitration. The connection panel displays the

arbitration priority of each master for each slave to which it is connected. By

default, SOPC Builder assigns arbitration priority 1 for each connected

master-slave pair.

2. For each master-slave connection in Table 3–5, double-click the box that represents

the connection and type the new value from the table.

Figure 3–11 shows the arbitration values after you make these assignments.

Table 3–4. Interrupt Priority Assignments

Component/Port Interrupt Priority Value

lcd_sgdma/csr_irq 2

sys_clk_timer/irq 8

jtag_uart/irq 10

touch_panel_pen_irq_n/irq 14

touch_panel_spi/irq 16

Table 3–5. Arbitration Priority Assignments

Master Port Slave Port Arbitration Priority

lcd_sgdma/m_read ddr_sdram/s1 50

lcd_sgdma/descriptor_read ddr_sdram/s1 8

cpu_ddr_clock_bridge/m1 ddr_sdram/s1 8

cpu/instruction_master cpu_ddr_clock_bridge/s1 8

cpu/data_master cpu_ddr_clock-bridge/s1 8

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