Cypress Semiconductor Perform CY7C1380D Especificaciones descargar pdf (Pagina 14)

3–2 Chapter 3: Building the SOPC System

Specify the SOPC Builder System Components

Nios II System Architect Design Tutorial © June 2009 Altera Corporation

Preliminary

Table 3–1 shows the components in the partial system provided in your Quartus II

project.

1 Ignore the error messages that appear in the SOPC Builder message console. When

you perform the steps in “Coordinate Components in the System” on page 3–9, these

errors are resolved.

This section contains the instructions that show you how to perform the following

actions:

1. Add a Nios II Processor to Your System

Table 3–1. Components in the Partial SOPC Builder System

Component Component Instance Name Component Role

System ID sysid Allows the Nios II IDE to verify that the software is built for the

correct hardware version

Avalon-MM Tristate

Bridge

flash_ssram_tristate_bridge Allows pin-sharing to better enable the FPGA to drive multiple

external devices, such as SRAM and flash memory

Cypress CY7C1380,

under SRAM

ssram This SRAM controller controls the timing for driving read and write

transactions on this external SRAM. The SRAM stores the software

program code, stack, and exception sections.

Flash Memory (CFI) ext_flash This Flash memory controller controls the timing for driving read

and write transactions on the external CFI flash memory. The CFI

flash memory device stores Nios II application software, the CPU

reset vector, and the JPEG images for the picture viewer application.

JTAG UART jtag_uart Enables software to access a debug serial port

Interval timer sys_clk_timer Enables software to perform periodic interrupts for maintenance

and to maintain software application timing requirements.

PIO (Parallel I/O) lcd_i2c_scl LCD controller interface components. The three-wire interface

includes a data signal, a clock signal, and an enable signal. Refer to

AN527: Implementing an LCD Controller.

PIO (Parallel I/O) lcd_i2c_en

PIO (Parallel I/O) lcd_i2c_sdat

PIO (Parallel I/O) pio_id_eeprom_scl Two-wire EEPROM ID interface components. The I2C serial

EEPROM ID chip stores information about the board, including the

touch screen calibration data.

PIO (Parallel I/O) pio_id_eeprom_dat

SPI (3 Wire Serial) touch_panel_spi Touch screen interface components. Refer to AN527: Implementing

an LCD Controller.

PIO (Parallel I/O) touch_panel_pen_irq_n

Avalon-ST Timing

Adapter

lcd_ta_sgdma_to_fifo Video pipeline components.Refer to AN527: Implementing an LCD

Controller.

On-Chip Memory lcd_pixel_fifo

Avalon-ST Timing

Adapter

lcd_ta_fifo_to_dfa

Avalon-ST Data

Format Adapter

lcd_64_to_32_bits_dfa

Pixel Converter

(BGR0 -> BGR)

lcd_pixel-converter

Avalon-ST Data

Format Adapter

lcd_24_to_8_bits_dfa

Video Sync Generator lcd_sync_generator

1 2 ... 9 10 11 12 13 14 15 16 17 18 19 ... 45 46

Comentarios a estos manuales

Sin comentarios

Cypress Semiconductor Perform CY7C1380D Especificaciones Pagina 14

Comentarios a estos manuales