Cypress Semiconductor Perform CY7C1513KV18 Manual de usuario descargar pdf (Pagina 15)

CYWUSB6934

CYWUSB6932

Document Number : 38-16007 Rev. *L Page 15 of 34

3 Underflow The Underflow bit is used to enable the interrupt associated with an underflow condition associated with the

Transmit SERDES Data register (Reg 0x0F)

1 = Underflow interrupt enabled.

0 = Underflow interrupt disabled.

An underflow condition occurs when attempting to transmit while the Transmit SERDES Data register (Reg 0x0F)

does not have any data.

2 Overflow The Overflow bit is used to enabled the interrupt associated with an overflow condition with the Transmit SERDES

Data register (0x0F).

1 = Overflow interrupt enabled.

0 = Overflow interrupt disabled.

An overflow condition occurs when attempting to write new data to the Transmit SERDES Data register (Reg

0x0F) before the preceding data has been transferred to the transmit shift register.

1 Done The Done bit is used to enable the interrupt that signals the end of the transmission of data.

1 = Done interrupt enabled.

0 = Done interrupt disabled.

The Done condition occurs when the Transmit SERDES Data register (Reg 0x0F) has transmitted all of its data

and there is no more data for it to transmit.

0 Empty The Empty bit is used to enable the interrupt that signals when the Transmit SERDES register (Reg 0x0F) is empty.

1 = Empty interrupt enabled.

0 = Empty interrupt disabled.

The Empty condition occurs when the Transmit SERDES Data register (Reg 0x0F) is loaded into the transmit

buffer and it's safe to load the next byte

Bit Name Description

Not Recommended for New Designs

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Cypress Semiconductor Perform CY7C1513KV18 Manual de usuario Pagina 15