Cypress Semiconductor FLEx36 CY7C0850AV Manual de usuario Pagina 14

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CY7C0850AV,CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Document #: 38-06070 Rev. *K Page 14 of 36
Maximum Ratings
Exceeding maximum ratings
[19]
may impair the useful life of the
device. These user guidelines are not tested.
Storage temperature............................... –65
C to + 150 C
Ambient temperature with
Power applied..........................................–55
C to + 125 C
Supply voltage to ground potential ..............–0.5 V to + 4.6 V
DC voltage applied to
Outputs in High-Z state........................ –0.5 V to V
DD
+ 0.5 V
DC input voltage............................. –0.5 V to V
DD
+ 0.5 V
[20]
Output current into outputs (LOW) .............................. 20 mA
Static discharge voltage...........................................> 2000 V
(JEDEC JESD22-A114-2000B)
Latch-up current .....................................................> 200 mA
Operating Range
Range Ambient Temperature V
DD
Commercial 0 C to +70 C 3.3 V ± 165 mV
Industrial –40
C to +85 C 3.3 V ± 165 mV
Electrical Characteristics
Over the Operating Range
Parameter Description
-167 -133 -100
Unit
Min Typ Max Min Typ Max Min Typ Max
V
OH
Output HIGH voltage (V
DD
= Min., I
OH
= –4.0 mA) 2.4 2.4 2.4 V
V
OL
Output LOW voltage (V
DD
= Min., I
OL
= +4.0 mA) 0.4 0.4 0.4 V
V
IH
Input HIGH voltage 2.0 2.0 2.0 V
V
IL
Input LOW voltage 0.8 0.8 0.8 V
I
OZ
Output leakage current –10 10 –10 10 –10 10 A
I
IX1
Input leakage current except TDI, TMS, MRST –10 10 –10 10 –10 10 A
I
IX2
Input leakage current TDI, TMS, MRST –0.1 1.0 –0.1 1.0 –0.1 1.0 mA
I
CC
Operating current for
(V
DD
= Max.,I
OUT
= 0 mA),
Outputs disabled
CY7C0850AV
CY7C0851V/AV
CY7C0852V/AV
225 300 225 300 mA
CY7C0853V/
CY7C0853AV
270 400 200 310
I
SB1
[22]
Standby current (both ports TTL level)
CE
L
and CE
R
V
IH
, f = f
MAX
90 115 90 115 90 115 mA
I
SB2
[22]
Standby current (one port TTL level)
CE
L
| CE
R
V
IH
, f = f
MAX
160 210 160 210 160 210 mA
I
SB3
[22]
Standby current (both ports CMOS level)
CE
L
and CE
R
V
DD
– 0.2 V, f = 0
55 75 55 75 55 75 mA
I
SB4
[22]
Standby current (one port CMOS level)
CE
L
| CE
R
V
IH
, f = f
MAX
160 210 160 210 160 210 mA
I
SB5
Operating current
(V
DD
= Max, I
OUT
= 0 mA, f = 0)
Outputs disabled
CY7C0853V/
CY7C0853AV
70 100 70 100 mA
Capacitance
Part Number
[21]
Parameter Description Test Conditions Max Unit
CY7C0850AV,CY7C0851V
CY7C0851AV, CY7C0852V,
CY7C0852AV
C
IN
Input capacitance T
A
= 25 C, f = 1 MHz,
V
DD
= 3.3 V
13 pF
C
OUT
Output capacitance 10 pF
CY7C0853V,CY7C0853AV C
IN
Input capacitance 22 pF
C
OUT
Output capacitance 20 pF
Notes
19. The voltage on any input or I/O pin can not exceed the power pin during power up.
20. Pulse width < 20 ns.
21. C
OUT
also references C
I/O
.
22. I
SB1
, I
SB2
, I
SB3
and I
SB4
are not applicable forCY7C0853V/ CY7C0853AV because it can not be powered down by using chip enable pins.
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