Cypress Semiconductor CYDC128B16 Manual de usuario descargar pdf (Pagina 2)

CYDC128B16

Document #: 001-01638 Rev. *H Page 2 of 29

Notes

1. A

0

–A

11

for 4k devices; A

0

–A

12

for 8k devices; A

0

–A

13

for 16k devices.

2. BUSY

is an output in master mode and an input in slave mode.

IO

Control

Address Decode

MailboxesINT

L

INT

R

Address Decode

16K X 16

Dual Ported Array

IO

Control

Interrupt

Arbitration

Semaphore

A [13:0]

R

CE

R

BUSY

R

I/O[15:0]

R

LB

R

I/O[15:0]

L

LB

L

OE

L

BUSY

L

A[13:0]

L

R/W

L

CE

L

M/S

UB

L

UB

R

SEM

L

SEM

R

Input Read

Register and

Output Drive

Register

CE

R

OE

R

OE

R

R/W

R

R/W

R

ODR

0

- ODR

4

CE

L

OE

L

R/W

L

IRR

0

,IRR

1

SFEN

Top Level Block Diagram

[1, 2]

[+] Feedback

1 2 3 4 5 6 7 ... 29 30

Comentarios a estos manuales

Sin comentarios