Cypress Semiconductor STK14C88-5 Manual de usuario Pagina 10

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STK14C88
Document Number: 001-52038 Rev. *D Page 10 of 21
Software STORE/RECALL Mode Selection
E W A
13
- A
0
(hex) Mode I/O POWER Notes
L H 0E38
31C7
03E0
3C1F
303F
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Output Data
Output Data
Output Data
Output Data
Output Data
Active
17, 21, 22, 23
0FC0 Nonvolatile STORE Output High Z I
CC2
L H 0E38
31C7
03E0
3C1F
303F
0C63
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Read SRAM
Nonvolatile RECALL
Output Data
Output Data
Output Data
Output Data
Output Data
Output High Z
Active 17, 21, 22, 23
Software-Controlled STORE/RECALL Cycle
NO.
Symbols
Parameter
STK14C88-25 STK14C88-35 STK14C88-45
Unit Notes
Standard Alt. Min Max Min Max Min Max
33 t
AVAV
t
RC
STORE/RECALL initiation cycle time 35 45 55 ns 17
34 t
AVEL
t
AS
Address setup time 0 0 0 ns 24, 25
35 t
ELEH
t
CW
Clock pulse width 25 30 35 ns 24, 25
36 t
ELAX
Address hold time 20 20 20 ns 24, 25
37 t
RECALL
RECALL duration 20 20 20 s–
Figure 10. E
Controlled Software STORE/RECALL Cycle
[25]
Notes
21. The six consecutive addresses must be in the order listed. W
must be high during all six consecutive E controlled cycles to enable a nonvolatile cycle.
22. While there are 15 addresses on the STK14C88, only the lower 14 are used to control software modes.
23. I/O state assumes G
< V
IL
. Activation of nonvolatile cycles does not depend on state of G.
24. The software sequence is clocked on the falling edge of E
controlled reads without involving G (double clocking aborts the sequence).
25. The six consecutive addresses must be in the order listed in the Software STORE/RECALL Mode Selection Table: (0E38, 31C7, 03E0, 3C1F, 303F, 0FC0) for a STORE
cycle or (0E38, 31C7, 03E0, 3C1F, 303F, 0C63) for a RECALL cycle. W
must be high during all six consecutive cycles.
DATA VALID
HIGH IMPEDANCE
ADDRESS #6ADDRESS #1
DATA VALID
33
t
AVAV
DATA VALID
DQ (DATA
E
ADDRESS
29 37
t
STORE
/ t
RECALL
33
t
AVAV
34
t
AVEL
35
t
ELEH
36
t
ELAX
Not Recommended for New Designs
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