Cypress Semiconductor CY7C1364C Manual de usuario descargar pdf (Pagina 19)

CY7C1364C

Document Number: 001-74592 Rev. *B Page 19 of 29

SB3

Automatic CE Power-down

Current – CMOS Inputs

= Max., Device Deselected,

 0.3 V or V

> V

DDQ

– 0.3 V,

f = f

MAX

= 1/t

CYC

6-ns cycle,

166 MHz

– 100 mA

SB4

Automatic CE Power-down

Current – TTL Inputs

= Max., Device Deselected,

 V

or V

 V

, f = 0

6-ns cycle,

166 MHz

– 40 mA

Electrical Characteristics (continued)

Over the Operating Range

Parameter

[12, 13]

Description Test Conditions Min Max Unit

Capacitance

Parameter

[14]

Description Test Conditions

165-ball FBGA

Max.

Unit

Input capacitance T

= 25 °C, f = 1 MHz, V

= 3.3 V, V

DDQ

= 2.5 V 5 pF

CLK

Clock input capacitance 5pF

I/O

Input/Output capacitance 7pF

Thermal Resistance

Parameter

[14]

Description Test Conditions

165-ball FBGA

Package

Unit



Thermal resistance

(junction to ambient)

Test conditions follow standard test methods and

procedures for measuring thermal impedance, per

EIA/JESD51

16.8 C/W



Thermal resistance

(junction to case)

3 C/W

AC Test Loads and Waveforms

Figure 2. AC Test Loads and Waveforms

OUTPUT

R = 317

R = 351

5pF

INCLUDING

JIG AND

SCOPE

(a) (b)

OUTPUT

= 50

= 1.5V

3.3V

ALL INPUT PULSES

DDQ

GND

90%

10%

90%

10%

 1 ns

(c)

OUTPUT

R = 1667

R =1538

5pF

INCLUDING

JIG AND

SCOPE

(a) (b)

OUTPUT

= 50

= 1.25V

2.5V

ALL INPUT PULSES

DDQ

GND

90%

10%

90%

10%

 1 ns

(c)

3.3 V I/O Test Load

2.5 V I/O Test Load

Note

14. Tested initially and after any design or process change that may affect these parameters.

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