Cypress Semiconductor CY8C24223 Manual de usuario descargar pdf (Pagina 28)

CY8C24123

CY8C24223, CY8C24423

Document Number: 38-12011 Rev. *G Page 28 of 43

Figure 12. PLL Lock Timing Diagram

Figure 13. PLL Lock for Low Gain Setting Timing Diagram

Figure 14. External Crystal Oscillator Startup Timing Diagram

Figure 15. 24 MHz Period Jitter (IMO) Timing Diagram

Figure 16. 32 kHz Period Jitter (ECO) Timing Diagram

24 MHz

PLL

Enable

PLLSLEW

PLL

Gain

24 MHz

PLL

Enable

PLLSLEWLOW

PLL

Gain

32 kHz

32K2

32K

Select

Jitter24M1

24M

Jitter32k

32K2

[+] Feedback

1 2 ... 23 24 25 26 27 28 29 30 31 32 33 ... 42 43

Sin comentarios

Cypress Semiconductor CY8C24223 Manual de usuario Pagina 28