Cypress Semiconductor SL811HS Especificaciones

SL811HS Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600Document #: 38-08008 Rev. *A Revised March 1

SL811HS Document #: 38-08008 Rev. *A Page 10 of 29• Bit 3 is reserved for future usage.• The SL811HS uses bit 5 to enable transfer of a data packet a

SL811HS Document #: 38-08008 Rev. *A Page 11 of 295.2.4 SOF Packet GenerationThe SL811HS automatically computes CRC5 by hardware. No CRC or SOF is re

SL811HS Document #: 38-08008 Rev. *A Page 12 of 295.2.8 USB-A/USB-B Host Transfer Count Register (Read), USB Address (Write) [04H, 0CH]This register

SL811HS Document #: 38-08008 Rev. *A Page 13 of 295.3.2 J-K Programming States [bits 3 and 4 of Control Register 05H]The J-K force state control and

SL811HS Document #: 38-08008 Rev. *A Page 14 of 295.3.6 USB Address Register, Reserved, Address [07H]This register is reserved for the device USB Add

SL811HS Document #: 38-08008 Rev. *A Page 15 of 295.3.9 SOF Counter HIGH/Control2 Register, Address [0FH, READ/WRITE]When writing to this register th

SL811HS Document #: 38-08008 Rev. *A Page 16 of 296.0 SL811HS and SL811HST-AC Physical ConnectionsThis part is offered in both a 28-pin PLCC package

SL811HS Document #: 38-08008 Rev. *A Page 17 of 296.1.3 SL811HS USB Host Controller Pins DescriptionThe SL811HS package is a 28-pin PLCC. The device

SL811HS Document #: 38-08008 Rev. *A Page 18 of 29The Diagram below illustrates a simple +3.3V voltage source.6.1.4 Package Markings (SL811HS)YYWW =

SL811HS Document #: 38-08008 Rev. *A Page 19 of 296.2 SL811HST-AC Physical Connections6.2.1 SL811HST-AC Pin Layout6.2.2 Mechanical Dimensions 48-Pin

SL811HS Document #: 38-08008 Rev. *A Page 2 of 29TABLE OF CONTENTS1.0 CONVENTIONS ...

SL811HS Document #: 38-08008 Rev. *A Page 20 of 296.2.3 SL811HST-AC USB Host Controller Pins DescriptionThe SL811HST-AC is packaged in a 48-pin TQFP.

SL811HS Document #: 38-08008 Rev. *A Page 21 of 29Notes:12. The A0 Address bit is used to access address register or data registers in I/O Mapped or

SL811HS Document #: 38-08008 Rev. *A Page 22 of 297.0 Electrical Specifications7.1 Absolute Maximum RatingsThis section lists the absolute maximum r

SL811HS Document #: 38-08008 Rev. *A Page 23 of 297.4 DC Characteristics7.5 USB Host Transceiver CharacteristicsEvery VDD pin, including USB VDD, has

SL811HS Document #: 38-08008 Rev. *A Page 24 of 297.6 Bus Interface Timing Requirements7.6.1 I/O Write CycleNote: nCS an be held LOW for multiple Wri

SL811HS Document #: 38-08008 Rev. *A Page 25 of 297.6.2 I/O Read CycleNote. NCS can be kept LOW during multiple Read cycles provided nRD is cycled. R

SL811HS Document #: 38-08008 Rev. *A Page 26 of 297.6.3 Reset TimingNote. Clock is 48-MHz nominal.Parameter Description Min. Typ. Max.tRESETnRst Puls

SL811HS Document #: 38-08008 Rev. *A Page 27 of 297.6.4 Clock Timing SpecificationsParameter Description Min. Typ. Max.tCLKClock Period (48 MHz) 20.0

SL811HSDocument #: 38-08008 Rev. *A Page 28 of 29© Cypress Semiconductor Corporation, 2002. The information contained herein is subject to change wit

SL811HS Document #: 38-08008 Rev. *A Page 29 of 29Document Title: SL811HS USB Host/Slave Controllers Hardware SpecificationDocument Number: 38-08008R

SL811HS Document #: 38-08008 Rev. *A Page 3 of 29License AgreementUse of this document and the intellectual properties contained herein indicates acc

SL811HS Document #: 38-08008 Rev. *A Page 4 of 291.0 Conventions1,2,3,4 Numbers without annotations are decimals.Dh, 1Fh, 39h Hexadecimal numbers ar

SL811HS Document #: 38-08008 Rev. *A Page 5 of 29 4.2 SL811HS Host or Slave Mode Selection [Master/Slave Mode]SL811HS can work in two modes—host or s

SL811HS Document #: 38-08008 Rev. *A Page 6 of 294.4 Data Port, Microprocessor InterfaceThe SL811HS microprocessor interface provides an 8-bit bidire

SL811HS Document #: 38-08008 Rev. *A Page 7 of 29Note:1. CM (Clock Mode) pin of the SL811HS should be tied to GND when 48-MHz Xtal circuit or 48-MHz

SL811HS Document #: 38-08008 Rev. *A Page 8 of 294.7.1 Typical Crystal RequirementsThe following are examples of “typical requirements”. Please note

SL811HS Document #: 38-08008 Rev. *A Page 9 of 29The registers in the SL811HS are divided into two major groups. The first group is referred to as US